| 摘要 |
The present invention relates to an EEPROM cell with a single polysilicon level which corresponds to a floating gate which extends, on the one hand, via a first insulating layer above a heavily-doped region of a first type of conductivity forming a control gate, on the other hand, via a second insulating layer to form a gate finger above a channel area of the cell. The second insulating layer is a sufficiently thin layer to allow a tunnel effect and the drain area of the cell has a gradual profile and partially extends under the gate finger.
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