| 摘要 |
PURPOSE: A semiconductor memory device of repair is provided to enhance efficiency of a chip by arranging redundancy cells corresponding to the number of repair activation circuit. CONSTITUTION: A repair activation circuit(210) having an address fuse set receives low addresses and column addresses from the first to the third address buffers(201-203) and maintains a low state and a high state according to states of the low addresses and the column addresses. A repair flag circuit(211), a selection block(209), and a repair word line driver(213) are controlled by an output of the repair activation circuit(210). The repair flag circuit(211) outputs a repair flag signal of a high state by summing the outputs of the repair activation circuit(210). The selection block(209) is controlled by the repair flag signal of high state. The selection block(209) controls the second local address decoder(207).
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