CIRCUIT FOR MEASURING ERASE SPEED OF FLASH MEMORY CELL

摘要

PURPOSE: A circuit for measuring an erase speed of a flash memory cell is provided to measure correctly the erase speed by erasing a flash memory cell according to voltage applied from the second power terminal of a switching circuit. CONSTITUTION: A switching portion is connected with a drain terminal of a flash memory cell. In the switching portion, The first PMOS transistor(P11) and a capacitor(Cp) are connected between the first power terminal(Vina) and an output terminal(Vout) connected with a drain terminal. The second PMOS transistor(P11) is connected between the first power terminal(Vina) and the output terminal(Vout). The first NMOS transistor is connected between a gate terminal of the first PMOS transistor(P11) and a ground terminal(Vss). The first PMOS transistor(P11) and the first NMOS transistor are used as inverters driven by the second power terminal(Vinb).