| 摘要 |
PURPOSE: A device of controlling an error correction memory is provided to allocate a memory map appropriate for recording characteristics of an external memory, and to generate an address for writing and reading data according to the memory map, thereby using a simple algorithm as reducing an error correction time. CONSTITUTION: A PO(Parity Outer) encoder(3) receives information stored in a buffer. The PO encoder reads one of error correction block data, and performs an encoding operation for PO. A sector information address generator(31) generates data addresses for writing and storing sector information, and transmits the data addresses to a memory controller(7). The addresses are transmitted to an SDRAM(8). A timing controller(34) controls the memory controller at predetermined time to output a demanded address. A main data address generator(32) generates an address while reading main data. A PO data address generator(33) reads 192 data to generate an address for storing results of the encoding operation for the PO.
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