| 摘要 |
PURPOSE: A method for fabricating a metal interconnection and a capacitor of a semiconductor device are provided to easily form a metal-insulator-metal(MIM) capacitor having high capacitance without increasing a metal layer, by forming a dual damascene pattern through a conventional process and by forming the MIM capacitor of a three-dimensional structure in the dual damascene pattern. CONSTITUTION: A predetermined region of an interlayer dielectric(2) is etched to form the dual damascene pattern composed of a trench or trench/via in a semiconductor substrate(1). The first metal diffusion barrier layer(10) is formed on the semiconductor substrate. A metal material is deposited on the semiconductor substrate. The metal material on the interlayer dielectric and the first metal diffusion barrier layer are eliminated by a chemical mechanical polishing(CMP) process to form the first metal interconnection(3) in the trench or the dual damascene pattern. A photoresist layer exposing a capacitor formation region is formed. The exposed first metal interconnection is removed by an etch process. The photoresist layer pattern is removed. A lower electrode(13), a dielectric layer(14), an upper electrode(15) and the second metal diffusion barrier layer(16) are sequentially formed on the semiconductor substrate. A metal material is deposited to completely fill the residual space of the trench or dual damascene pattern. The metal material, the second metal diffusion barrier layer, the upper electrode, the dielectric layer and the lower electrode are eliminated and planarized to form the second metal interconnection(11) and the capacitor by performing a CMP process. |
