| 摘要 |
PURPOSE: A method for fabricating a transistor of a semiconductor device is provided to reduce the width of a gate line in an active region, by defining a gate line wider than a desired width, by forming a trench in a portion reserved for the gate line and by forming an insulation layer spacer on the inner wall of the trench. CONSTITUTION: A buffer layer, a lower passivation layer and a dummy gate layer are sequentially formed on a semiconductor substrate(21). A part of the dummy gate layer and the lower passivation layer is etched to form a gate line trench. A lightly doped drain(LDD) region is formed in the semiconductor substrate by an LDD ion implantation process. The insulation layer spacer(26) is formed on the inner wall of the gate line trench. The exposed portion of the buffer layer is removed and a gate oxide layer(23) is formed. A gate line material layer is formed on the resultant structure including the gate oxide layer. The gate material layer is polished until the dummy gate layer is exposed. The dummy gate layer and the lower passivation layer are eliminated. A source/drain junction part(27) is formed by a source/drain ion implantation process.
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