发明名称 MEMORY DATA STORAGE AND ERROR CONTROL
摘要 A storage using a memory device with a continuous transfer function as typified by an SRAM (Synchronous Random Access Memory) or a DRAM (Dynamic RAM) with an EDO (Extended Data Out) is disclosed. As for the detection/correction of data errors, the storage reduces the ratio of the number of check bits to the number of data bits by effectively using a burst transfer function available with the memory device. This allow a single memory device to recover from faults. This can be done with means for dividing an ECC unit into a plurality of parts in a continuous transfer direction and writing one of them in the memory device at a time, and means for detecting/correcting the errors of data read out of the memory device while buffering them on an ECC basis.
申请公布号 CA2248731(C) 申请公布日期 2002.07.09
申请号 CA19982248731 申请日期 1998.09.28
申请人 NEC CORPORATION 发明人 KISHINO, TSUYOSHI
分类号 G06F12/16;G06F11/10;(IPC1-7):G11C11/409;G11C29/00;G11C11/419 主分类号 G06F12/16
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