发明名称 Decoupled address and data access to an SDRAM
摘要 A buffer manager provides address information for reading and writing data to an SDRAM. The address information is translated from a flat memory address space into an SDRAM address space. The buffer manager operates based upon a first clock and the SDRAM operates based upon a second clock. Accordingly, a synchronization circuit synchronizes the data. The translation of address information occurs simultaneously with the synchronization of data.
申请公布号 US6418518(B1) 申请公布日期 2002.07.09
申请号 US19980157079 申请日期 1998.09.18
申请人 NATIONAL SEMICONDUCTOR CORPORATION 发明人 WEN SHEUNG-FAN
分类号 G06F12/02;(IPC1-7):G06F12/00 主分类号 G06F12/02
代理机构 代理人
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