发明名称 |
Void eliminating seed layer and conductor core integrated circuit interconnects |
摘要 |
An integrated circuit and manufacturing method therefor is provided having a semiconductor substrate with a semiconductor device. A device dielectric layer is formed on the semiconductor substrate and a channel dielectric layer on the device dielectric layer has an opening formed therein. A barrier layer lines the channel opening and a conductor core fills the opening over the barrier layer. A seed layer is disposed between the barrier layer and the conductor core. The seed layer has an associated element which is formed during annealing into an intermetallic compound which has a density lower than the density of the conductor core.
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申请公布号 |
US6417566(B1) |
申请公布日期 |
2002.07.09 |
申请号 |
US20000705121 |
申请日期 |
2000.11.01 |
申请人 |
ADVANCED MICRO DEVICES, INC. |
发明人 |
WANG PIN-CHIN CONNIE;MARATHE AMIT P. |
分类号 |
H01L21/768;H01L23/522;H01L23/532;(IPC1-7):H01L23/48 |
主分类号 |
H01L21/768 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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