| 摘要 |
PURPOSE: An apparatus for controlling bit line sensing timing is provided to stabilize a data sensing operation of a bit line sense amplifier by detecting variation of electric potential and controlling activation timing of a sensing start signal. CONSTITUTION: The first, the second, and the third switching elements(SW1,SW2,SW3) are connected with each output terminal of the first, the second, and the third delay portions(10,12,14). The first and the second electric potential portions(30,32) detect electric potential values lower than or higher than the reference electric potential value. The first and the second level shifters(40,42) perform level shifting operations for the electric potential of the first and the second electric potential portions(30,32). A delay control portion(50) generates switching control signals of the first, the second, and the third switching elements(SW1,SW2,SW3) and controls a delay time of a sensing start control signal.
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