| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide a skew adjustment type clock driver circuit capable of properly performing timing adjustment in a simple constitution. SOLUTION: The skew adjustment type clock driver circuit for performing timing adjustment by detecting the presence or absence of the changing timing of inter-system P1 and P2 clock signals to be generated by clock drivers 1a and 1b is provided with timing adjusting circuits 3a and 3b serially connected to clock drivers 1a and 1b capable of selectively operating whether or not delay elements should be inserted serially with the clock drives 1a and 1b. In this case, the selecting operation of the timing adjusting circuits 3a and 3b is made controllable according to the difference of the changing timings of the inter-system P1 and P2 clock signals.</p> |
