LEVEL CONVERSION CIRCUIT, SEMICONDUCTOR INTEGRATED CIRCUIT AND SEMICONDUCTOR STORAGE DEVICE

摘要

PROBLEM TO BE SOLVED: To provide a technique for increasingly reducing output voltage on the negative side without obstructing the transmission of logic. SOLUTION: The second circuit comprises a latch circuit which is constituted with the connection of the first inverter (INV3) and the second inverter (INV4) and transistors (Q5 and Q10) for determining the logics of the storage nodes (P2 and P3) of the latch circuit. After the logics of the storage nodes are determined, the latch circuit can keep the state of the memory even when the source voltage of the level conversion circuit varies to some extent, and therefore the output voltage on the negative side can increasingly be reduced by reducing the level of the source voltage on the side of high electric potential without obstruction the transmission of the logic.