发明名称 PEAK CURRENT ATTENUATING CIRCUIT
摘要 PURPOSE: A peak current attenuating circuit is provided to generate an internal clock using an output signal of an oscillator and stabilize an operation thereof by attenuating an instant peak current generated according to a voltage level of an output signal from the oscillator. CONSTITUTION: An oscillator(10) generates a first pulse signal having a predetermined period. An inverter(IN2) inverts and transmits the first pulse signal to a second node. A clock generator(20) receives a signal of the second node and generates and outputs a square wave signal to an output terminal. A delay circuit(32) delays the square wave signal. A controller(30) performs an AND operation of the delayed square wave signal by the delay circuit(32) and an oscillator stop signal. A transfer gate(P1,N1) equalizes a first node and the second node when an output signal of the controller(30) has a first level. An NMOS transistor(N2) discharges a voltage of the first node to a ground voltage when the output signal of the controller(30) has a second level.
申请公布号 KR20020053564(A) 申请公布日期 2002.07.05
申请号 KR20000083227 申请日期 2000.12.27
申请人 HYNIX SEMICONDUCTOR INC. 发明人 HONG, BYEONG IL
分类号 H03K3/00;(IPC1-7):H03K3/00 主分类号 H03K3/00
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