发明名称 |
Chip scale package |
摘要 |
A chip scale package comprises a film substrate attached to the active surface of a semiconductor chip by an adhesive layer. The adhesive layer has a plurality of apertures formed corresponding to bonding pads on the chip. The film substrate includes a film and a plurality of conductive leads formed thereon. The film has a plurality of first openings formed corresponding to the apertures of the adhesive layer and a plurality of second openings. Each lead on the film has a first end portion projecting into one of the first openings of the film and a second end portion exposed from one of the second openings of the film. Each aperture and corresponding first opening are filled with a conductive paste embedding the first end portion of one lead therein so as to electrically connect the bonding pads of the chip and the conductive leads of the film substrate. A plurality of solder bumps formed on the second end portions of leads through the second openings of the film. This invention further provides a method of making the chip scale package. |
申请公布号 |
US2002084535(A1) |
申请公布日期 |
2002.07.04 |
申请号 |
US20010752556 |
申请日期 |
2001.01.03 |
申请人 |
ADVANCED SEMICONDUCTOR ENGINEERING INC. |
发明人 |
LEE XIN HUI;DING YI-CHUAN;CHEN KUN-CHING |
分类号 |
H01L23/31;H01L23/532;(IPC1-7):H01L23/48;H01L23/52 |
主分类号 |
H01L23/31 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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