发明名称 |
ARRANGEMENT OF BITLINE BOOSTING CAPACITOR IN SEMICONDUCTOR MEMORY DEVICE |
摘要 |
A semiconductor memory device includes first and second isolation transistors for electrically connecting/isolating a pair of bitlines to/from a sense amplifier circuit, and a MOS transistor having a source region that is shared with one of sources of the first and second isolation transistors. The MOS transistor may be used as a bitline boosting capacitor.
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申请公布号 |
US2002085428(A1) |
申请公布日期 |
2002.07.04 |
申请号 |
US20010879076 |
申请日期 |
2001.06.11 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
KANG SANG-SEOK;LEE YUN-SANG;CHOI JONG-HYUN;JOO JAE-HOON |
分类号 |
G11C7/12;G11C11/4094;H01L27/108;(IPC1-7):G11C5/00 |
主分类号 |
G11C7/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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