发明名称 |
TECHNIQUES TO SYNCHRONOUSLY OPERATE A SYNCHRONOUS MEMORY |
摘要 |
Among the embodiments of the present invention, is memory control circuitry (40) that includes a detection circuit (44) and a monostable multivibrator (104). This detection circuit (40) is responsive to a transition of a number of address inputs to generate a trigger signal. The monostable multivibrator (104) is responsive to the trigger signal to change a memory control output signal from a first state to a second state. The monostable multivibrator (40) is further responsive to a memory interlock input signal to change the memory control output signal from the second state to the first state. The memory control circuitry (40) can be coupled to drive a clock input of a synchronous memory (30) to provide for asynchronous operation thereof.
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申请公布号 |
WO02052570(A1) |
申请公布日期 |
2002.07.04 |
申请号 |
WO2001IB02658 |
申请日期 |
2001.12.19 |
申请人 |
KONINKLIJKE PHILIPS ELECTRONICS N.V. |
发明人 |
GRAY, KENNETH, S. |
分类号 |
G11C11/413;G06F12/00;G11C7/10;G11C8/18;H03K5/1532;(IPC1-7):G11C7/10;G06F13/42 |
主分类号 |
G11C11/413 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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