发明名称 METHOD FOR FORMING INTERLAYER DIELECTRIC OF SEMICONDUCTOR DEVICE
摘要 PURPOSE: A method for forming an interlayer dielectric of a semiconductor device is provided to easily achieve a processing margin and to prevent an over etch by forming a planarized layer on the interlayer dielectric. CONSTITUTION: After forming an interlayer dielectric(2) on a semiconductor substrate(1), metal lines(3) are formed on the interlayer dielectric. A first and a second insulating layer(4a,4b) are sequentially formed on the resultant structure. The surface of the second insulating layer(4b) is planarized by CMP(Chemical Mechanical Polishing). Then, a first and a second planarized layer(4c,4d) are sequentially formed on the second insulating layer(4b). At this time, the first and second planarized layers(4c,4d) are composed of an SOG(Spin On Glass) and a TEOS, respectively.
申请公布号 KR20020052681(A) 申请公布日期 2002.07.04
申请号 KR20000082107 申请日期 2000.12.26
申请人 HYNIX SEMICONDUCTOR INC. 发明人 LEE, JIN HYEOK
分类号 H01L21/3105;(IPC1-7):H01L21/310 主分类号 H01L21/3105
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