发明名称 Processor performance state control
摘要 A selectable control over multiple clock frequency/voltage level combinations that can be activated in a processor. A table can be placed in hardware that defines multiple combinations of CPU clock frequency and CPU operating voltage. By placing the table in hardware, it can be assured that all the various combinations will work for the particular processor device. Software can then be used to select a combination from this table, to control the actual frequency/voltage combination that is being implemented at a given time. This allows dynamic control over the power/performance tradeoff, so that the system can see maximum power savings consistent with acceptable performance, as operating and environmental considerations continue to change the most desirable selections.
申请公布号 US2002087896(A1) 申请公布日期 2002.07.04
申请号 US20000751528 申请日期 2000.12.29
申请人 CLINE LESLIE E.;DAI XIA;GEORGE VARGHESE;FARRELL ROBERT L. 发明人 CLINE LESLIE E.;DAI XIA;GEORGE VARGHESE;FARRELL ROBERT L.
分类号 G06F1/32;(IPC1-7):G06F1/26;G06F1/28;G06F1/30 主分类号 G06F1/32
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