发明名称 Method and apparatus for reducing components necessary for instruction pointer generation in a simultaneous multithreaded processor
摘要 A system and method for a simultaneous multithreaded processor that reduces the number of hardware components necessary as well as the complexity of design over current systems is disclosed. As opposed to requiring individual storage elements for saving instruction pointer information for each re-steer logic component within a processor pipeline, the present invention allows for instruction pointer information of an inactive thread to be stored in a single, "inactive thread' storage element until the thread becomes active again.
申请公布号 US2002087843(A1) 申请公布日期 2002.07.04
申请号 US20000753764 申请日期 2000.12.29
申请人 KOTTAPALLI SAILESH 发明人 KOTTAPALLI SAILESH
分类号 G06F9/38;(IPC1-7):G06F9/00 主分类号 G06F9/38
代理机构 代理人
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