发明名称 Apparatus for layout designing of semiconductor device, method of layout designing, and semiconductor device
摘要 A layout designing apparatus and a layout designing method that can improve the uniformity of the pattern density of a layout pattern in which dummy patterns are formed, and a semiconductor device manufactured using the layout designing method can be obtained. The layout designing method includes the steps of entering a plurality of circuit patterns of a semiconductor device; recognizing the positional data of the entered plurality of circuit patterns; producing a dummy pattern group including a plurality of dummy patterns, each of which being arranged per repetitive distance determined based on the recognized positional data of the circuit patterns; extracting a final dummy pattern including a dummy pattern located in a region not overlapping with the circuit patterns from the dummy pattern group; and outputting a layout pattern including the extracted final dummy pattern and the circuit patterns.
申请公布号 US2002087942(A1) 申请公布日期 2002.07.04
申请号 US20010900026 申请日期 2001.07.09
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 KITADA OSAMU
分类号 G06F17/50;H01L21/027;H01L21/82;H01L21/822;H01L27/04;(IPC1-7):G06F17/50 主分类号 G06F17/50
代理机构 代理人
主权项
地址