发明名称 Circuit arrangement
摘要 To provide a circuit arrangement (100) and a method for generating and amplifying an amplitude-limited DC signal whose level voltage is substantially proportional to the logarithm of the voltage amplitude of an input signal, by which the level indication, i.e. the level voltage of the DC signal generated and amplified in the circuit arrangement and by the method only depends on the amplitude and not on the frequency of the input signal, it is proposed that the last amplifier stage (30), particularly the collector circuits of the last amplifier stage (30) of an amplifier circuit comprising at least two amplifier stages (10; 20; 30) precedes a frequency (FM) demodulator unit (40), the frequency (FM) demodulator unit (40) precedes at least one quadrature stage (50, 60, 70) for squaring the output signal of the frequency (FM) demodulator unit (40), particularly the AC component of the output signal of the frequency (FM) demodulator unit (40), and at least one current adder unit (80) is provided for adding the level voltage of the output signal of the quadrature stage (50, 60, 70) to the level voltage of the amplifier stages (10; 20; 30).
申请公布号 US2002084839(A1) 申请公布日期 2002.07.04
申请号 US20010011970 申请日期 2001.12.03
申请人 KOHSIEK CORD-HEINRICH 发明人 KOHSIEK CORD-HEINRICH
分类号 H03D3/00;H03G7/00;(IPC1-7):G06G7/12 主分类号 H03D3/00
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