| 摘要 |
PURPOSE: To provide a semiconductor memory in which high speed defect relieving can be performed with low current consumption and without generation of excessive current when necessity of relieving a defect is tested. CONSTITUTION: A semiconductor memory is provided with fuses F01, F02 or the like to be cut off complementarily in accordance with a defective address, and n-channel field effect transistors TN0, TN1 cutting off a current flowing in these fuses. The fuses F01, F02, or the like and the n-channel field effect transistors TN0, TN1 are connected between a power source and ground. A gate of the n-channel field effect transistor is connected to a pad electrode PD, while connected to the power source through a load resistor RR. When necessity of relieving defect is tested, a low level is applied externally to the pad electrode PD, the n-channel field effect transistor TN0 is made an off-state. Hence, a through current is not made to flow between the power source and ground even if the fuse is not a cut off state when necessity of relieving the defect is tested.
|
