发明名称 |
Non-integer order dynamic systems |
摘要 |
<p>A circuit implementing a non-integer order dynamic system includes a neural network (1 to 5) adapted to receive at least one input signal (IS) and to generate therefrom at least one output signal (OS). The input and output signals (IS, OS) are related to each by a non-integer order integro-differential relationship through the coefficients of the neural network (1 to 5). A plurality (I, II) of such circuits, implementing respective non-integer order (PI< lambda >D< mu >) controllers can be interconnected in an arrangement wherein any of the integral (200) or differential (202) blocks included in one of those circuits generates a signal which is fed to any of the integral (200) or differential (204) blocks of another circuit in the system. <IMAGE></p> |
申请公布号 |
EP1220063(A1) |
申请公布日期 |
2002.07.03 |
申请号 |
EP20000128558 |
申请日期 |
2000.12.27 |
申请人 |
STMICROELECTRONICS S.R.L. |
发明人 |
ABBISSO, SALVATORE;CAPONETTO, RICCARDO;DIAMANTE, OLGA;PORTO, DOMENICO;DI COLA, EUSEBIO;FORTUNA, LUIGI |
分类号 |
G06N3/00;G05B11/42;G05B13/02;(IPC1-7):G05B13/02 |
主分类号 |
G06N3/00 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|