发明名称 |
Semiconductor device with reduced current consumption in standby state |
摘要 |
A logic portion outputs to a DRAM portion a start address and an end address indicating a memory region where data to be stored is present prior to transition to power down mode having reduced current consumption. In the power down mode, a refresh control unit holds the start address and the end address and controls refresh to be carried out for data only in a region requiring refresh. The power supply of the logic portion is set in off state in the power down mode and accordingly a semiconductor device can consume reduced current while holding data. |
申请公布号 |
US6414894(B2) |
申请公布日期 |
2002.07.02 |
申请号 |
US20010778062 |
申请日期 |
2001.02.07 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
OOISHI TSUKASA;TSUJI TAKAHARU;ISHIKAWA MASATOSHI;HIDAKA HIDETO;KATO HIROSHI |
分类号 |
G11C11/403;G06F1/26;G11C5/14;G11C7/00;G11C7/10;G11C11/401;G11C11/406;G11C11/407;H01L27/148;H03K19/00;H03K19/096;(IPC1-7):G11C7/00 |
主分类号 |
G11C11/403 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|