Parallel processor for use in distributed sample scrambler

摘要

A parallel processor of a distributed sample scrambler of cell-based physical layer of ISDN(Integrated Service Digital Network) used in a 16-bit mode of utopia interface is disclosed. The parallel processor employs a simple logic to process a predetermined bit of pseudo random binary bit stream in parallel, discriminating the cell boundary of the IDSN easily and reliably. The parallel processor comprises a first pseudo random bit stream production block for producing a first pseudo random binary bit stream within a word parallel clock according to a predetermined byte of an ATM(Asynchronous Transfer Mode) cell applied from an external; a second pseudo random bit stream production block for producing a second pseudo random binary bit stream within a word parallel clock according to the predetermined byte of the ATM cell; and a selector for selectively producing one of the first and the second pseudo random binary bit streams according to an external signal.