发明名称 |
Multiboard run-in tester for PCI expansions |
摘要 |
A system for running in, in which multiple PCI bus connections are each bridged to multiple boards-under-test. The presence or absence of power in each of these bus connections is monitored, and the boards-under-test are correspondingly powered up (or not). Multiple test-bed subboards are preferably used, each with multiple sockets for receiving boards-under-test with high-insertion-force connectors, and the independent power control permits the boards-under-test on one subboard to be powered off and swapped while the boards-under-test on the other subboard are still being exercised. Preferable a single movable extractor mechanism is mounted on each subboard, and can be positioned (with respect to any one of the high-insertion-force connectors) for linear extraction of the board-under-test without any torque.
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申请公布号 |
US6414505(B1) |
申请公布日期 |
2002.07.02 |
申请号 |
US19990433532 |
申请日期 |
1999.11.03 |
申请人 |
COMPAQ INFORMATION TECHNOLOGIES GROUP, L.P. |
发明人 |
STAUFFER TITUS D.;BELMORE WALTER J.;JONES BRYAN A.;HAIDAR HAISSAM H. |
分类号 |
G06F1/18;(IPC1-7):G01R31/02 |
主分类号 |
G06F1/18 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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