| 摘要 |
A system and method for parallel programming an electronic device's memory during manufacturing. In one embodiment, the electronic device is programmed in parallel with test code and a portion of the system code prior to board level testing. The test code is then used during board level testing of the electronic device. Once board level testing is complete, the electronic device is programmed with additional system code to complement the existing system code, whereby system level testing is then performed. |
