| 摘要 |
PURPOSE: A sensing circuit of a flash memory cell is provided, which improves a sensing speed by reducing a sensing output time of a '1' state cell from a sensing output of a '0' state cell. CONSTITUTION: The first resistor(R21) is connected between a power supply port(Vcc) and the first node(Q21), which is a sensing node of a main cell. The first PMOS transistor(P21) driven according to an address transition bar signal(ATDSUMb) is connected between the power supply port and the first node. The third NMOS transistor(N23) driven according to a control signal(SALEAK) is connected between the first node and a ground port(Vss). The first NMOS transistor(N21) and a main cell(M21) are connected between the first node and the ground port. The first NMOS transistor is driven according to an output of the first inverter(I21) inverting a potential of a bit line(BL1) of the main cell. Also, the main cell is driven according to a voltage applied through a word line.
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