发明名称 Processor and interface
摘要 A data processing apparatus comprises a processor constructed to operate under control of a sequence of program instructions selected from a predetermined instruction set; master circuitry to request access to storage locations of the processor; an interface circuit to provide an interface for an external apparatus to signal a request for access to the storage locations and an interface for the master circuitry to signal a request for access to the storage locations; and control to provide access between the storage locations and the interface circuit in response to the request only at predetermined points in execution of the stored program, the control being operable to fix periods of time for providing such access relative to the sequence of program instructions such that execution timing of the stored instructions is independent of whether a request is supplied to the interface.
申请公布号 US2008320247(A1) 申请公布日期 2008.12.25
申请号 US20070983754 申请日期 2007.11.08
申请人 MORFEY ALISTAIR G;SWEPSON KARL LEIGHTON;JOHNSON NEIL EDWARD;COOPER MARTIN DAVID;MYCROFT ALAN 发明人 MORFEY ALISTAIR G.;SWEPSON KARL LEIGHTON;JOHNSON NEIL EDWARD;COOPER MARTIN DAVID;MYCROFT ALAN
分类号 G06F12/00;G06F1/24;G06F11/10 主分类号 G06F12/00
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