发明名称 PACKET EXCHANGE SYSTEM
摘要 <p>PROBLEM TO BE SOLVED: To eliminate a delay generated by a sequence control even for a packet in which the sequence control is not required. SOLUTION: A packet exchange system divides a receiving packet into a plurality of blocks at an input line side, cascade connects and exchanges a plurality of sets of unit switches, and reassembles the packets at an output line side. In this system, a flag 15 for indicating whether a sequence control is necessary or not at the divided blocks 39 is imparted to the input line side. When the block has the flag having no necessity of sequence control, an output is produced at the output line side according to a packet assembling completion of itself irrespective of the time sequence with another packet.</p>
申请公布号 JP2002185506(A) 申请公布日期 2002.06.28
申请号 JP20000377377 申请日期 2000.12.12
申请人 MITSUBISHI ELECTRIC CORP 发明人 SHIKAMA TOSHIHIRO
分类号 H04L12/28;H04L12/56;(IPC1-7):H04L12/56 主分类号 H04L12/28
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