| 摘要 |
The system for controlling a two-states switch (3), activated or by default, by several, in particular two, redundant sources (1,2), comprises a device for managing breakdown (DGP) so that each source can either set the switch in the default state, by transmitting a stable signal either in a high state or a low state, or set the switch in the activated state, by transmitting a signal comprising at least one rising or falling front between the high and low states. The device (DGP) comprises one output (S) for connection to the switch (3) and several, in particular two, inputs (E1,E2) for connection to the sources (1,2), and is constituted by components each having a reliability higher than or comparable to that of a logic component. The device (DGP) and the sources (1,2) are structured and laid out so that, on one hand, when one or more sources are not broken down the blocking is either in the high state or the low state guarding the control of the switch, and on the other hand, when all sources are broken down the device forces the switch to the default state. The signals transmitted by the sources (1,2) for setting the switch (3) in the activated state are of the same frequency but with different cyclic ratios, or of the same cyclic ratio but with different frequencies (f,f/2), so that the frequencies and the cyclic ratios are constant. The signals are sufficiently different so to give in combination through an exclusive-OR gate a resulting signal whose cyclic ratio is outside two forbidden bands for any phase difference between the signals. The signals are periodic, square-wave, of pulse-width modulation (PWM) type. All sources are mutually identical, and are microcontrollers. The device (DGP) acts so that, on one hand, in the case of detecting at least one rising or falling front between the high and low states on at least one input forces the switch into the activated state, and on the other hand, in the case of absence of fronts on all inputs forces the switch into the default state. The device (DGP) comprises a logic block (4) containing an exclusive-OR gate, and an evaluation block (BE) containing an integrator (5) and a comparator (6) with a window. The integrator (5) comprises a resistor (R) and a capacitor (C). In the second embodiment, the evaluation block (BE) comprises a monostable connected in series with an integrator and a comparator. The comparator is with a reference, of Schmitt trigger type. In the third embodiment, the device (DGP) comprises for each input a branch with a monostable, an integrator, and a comparator, connected to one input of an OR-gate. In the fourth embodiment, the device (DGP) comprises for each input a monostable connected to an adder-integrator, whose output is connected to a comparator. The circuit breaker comprises the switch (3) and the device (DGP).
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