发明名称 |
INVERSE QUANTIZATION AND INVERSE DISCRETE COSINE TRANSFORMATION PROCESSOR USING EFFICIENT SHIFT REGISTER ARRAY |
摘要 |
PROBLEM TO BE SOLVED: To provide a device for carrying out inverse quantization and inverse discrete cosine transformation arithmetic using an effective shift register array. SOLUTION: A disclosed exclusive IQ/IDCT processor invents an effective data shift mechanism to many register arrays to attain satisfactory trade off between the operation speed and the manufacturing cost of a circuit. This processor is useful for real-time video decoding in particular. Mounting of an IQ/IDCT circuit to a VLSI is simplified remarkably. |
申请公布号 |
JP2002185964(A) |
申请公布日期 |
2002.06.28 |
申请号 |
JP20000374434 |
申请日期 |
2000.12.08 |
申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
BI MI MICHAEL;KON MUN CHAU;KITAGAWA MASAO |
分类号 |
G06F17/14;G06F17/16;H03M7/30;H03M7/42;H04N19/42;H04N19/423;H04N19/44;H04N19/60;H04N19/625;H04N19/91 |
主分类号 |
G06F17/14 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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