发明名称 Differential voltage reference buffer
摘要 An embodiment of the present invention provides a reference buffer circuit comprising a first reference voltage circuit to provide a first reference voltage at a first port to sink a first current at the first port; a second reference voltage circuit to provide a second reference voltage at a second port to sink a second current at the second port; and a current source circuit to source a source current at an output port, where the output port is connected to the second port. According to another embodiment of the present invention, the first and second ports are connected to a resistor ladder network of a flash analog-to-digital converter.
申请公布号 US2002080056(A1) 申请公布日期 2002.06.27
申请号 US20000747203 申请日期 2000.12.21
申请人 KARANICOLAS ANDREW N. 发明人 KARANICOLAS ANDREW N.
分类号 G05F3/24;H03M1/08;H03M1/36;(IPC1-7):H03M1/12 主分类号 G05F3/24
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