发明名称 |
Circuit structure for reading out memory cells of EPROM or EEPROM memory components has a memory cell array, a reference cell array and a current comparator. |
摘要 |
A first switch (30) has an output linked to a first input for a current comparator (10), also a first input linked to a memory cell array (1) and a second input linked to a reference cell array (2). A second switch (40) has an output linked to a second input for the current comparator and a first input linked to the reference cell array. A digital-analog converter linked to a second input for the second switch adjusts preset current values on input of matching digital values. An Independent claim is also included for a memory component like an EPROM or EEPROM memory storage with a circuit structure.
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申请公布号 |
DE10062124(C1) |
申请公布日期 |
2002.06.27 |
申请号 |
DE20001062124 |
申请日期 |
2000.12.13 |
申请人 |
INFINEON TECHNOLOGIES AG |
发明人 |
BLOCH, MARTIN;THALMAIER, CARMEN |
分类号 |
G11C16/28;(IPC1-7):G11C16/26 |
主分类号 |
G11C16/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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