| 摘要 |
An external address is input to an address register AR, and an internal address {circle over (1)} as an output from this address register AR is supplied to a burst length determination circuit BLD. The burst length is determined based on the level of this external address at a timing specified by a burst length setting signal /BL. A binary counter/logic BCL1 outputs burst internal addresses {circle over (2)} Ax'' to A0'' and internal addresses {circle over (1)} A16'' to A(x+1)' to a memory cell array MCA. This allows data having a desired burst length to be input or output.
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