| 摘要 |
PROBLEM TO BE SOLVED: To attain an operation mode with low power consumption by a microcomputer. SOLUTION: A destination of branch address after the stop of a flash EEPROM 1 is set in a RAM destination of branch storage register 18, and a block transfer state flag 19 is set. The data of the 000H-03FFH address of the flash EEPROM 1 are block-transferred to a RAM 2. When the transfer is ended, the block transfer state flag 19 is cleared, and a clock outputted from a selector 7 is switched to a low frequency oscillator 5 side by a clock selection signal 6. The operation of the flash EEPROM 1 with large power consumption is stopped. Afterwards, a CPU 3 is operated in response to an instruction from the RAM 2. |
