发明名称 Circuit configuration for programming a delay in a signal path
摘要 A circuit configuration includes two signal path sections that are used to program the delay of a signal path, in particular in DRAMs. The two signal path sections have different delays and can be driven in parallel at the input end. The two signal path sections can be connected to an output terminal via a multiplexer. A selection circuit includes two signal path sections which are connected between supply voltage potentials. The selection circuit has two complimentary transistors which are connected in series and has source-end programmable elements. These transistors can be driven by complimentary control signals. This permits the delay to be programmed flexibly with little expenditure on circuitry.
申请公布号 US2002079925(A1) 申请公布日期 2002.06.27
申请号 US20010046395 申请日期 2001.10.19
申请人 DIETRICH STEFAN;HEIN THOMAS;HEYNE PATRICK;MARKERT MICHAEL;MARX THILO;PARTSCH TORSTEN;KIESER SABINE;SCHROGMEIER PETER;SOMMER MICHAEL;WEIS CHRISTIAN 发明人 DIETRICH STEFAN;HEIN THOMAS;HEYNE PATRICK;MARKERT MICHAEL;MARX THILO;PARTSCH TORSTEN;KIESER SABINE;SCHROGMEIER PETER;SOMMER MICHAEL;WEIS CHRISTIAN
分类号 H03K5/00;H03K5/13;(IPC1-7):H03K19/017 主分类号 H03K5/00
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