发明名称 ELECTRONIC CIRCUIT OF LOW POWER CONSUMPTION, AND POWER CONSUMPTION REDUCING METHOD
摘要 <p>An electronic circuit of low power consumption, and a power consumption reducing method, designed to reduce power consumption without using a prediction which brings about a limit to the effectiveness of power consumption reduction. The electronic circuit comprises at least either a power supply regulating circuit which changes the power supply voltage by a voltage control signal or a clock regulating circuit which changes the frequency of the clock signal by a frequency control signal, a control circuit which generates at least either the voltage control signal or the frequency control signal, and a data processing circuit for processing an input data signal as it is fed with at least either the power supply from the power supply regulating circuit or a clock signal from the clock regulating circuit, wherein the control circuit is a circuit such that the generation of at least either the voltage control signal or the frequency control signal is effected in association with the input data signal and on the basis of throughput information indicating the size of the data processing executed by the data processing circuit.</p>
申请公布号 WO2002050645(P1) 申请公布日期 2002.06.27
申请号 JP2000009032 申请日期 2000.12.20
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