发明名称 |
Three-dimensional memory array and method for storing data bits and ECC bits therein |
摘要 |
The preferred embodiments described herein provide a three-dimensional memory array and method for storing data bits and ECC bits therein. In one preferred embodiment, a three-dimensional memory array of the type that includes multiple vertically-stacked layers of memory cells is provided. The three-dimensional memory array comprises a plurality of memory cells arranged in a plurality of physically-independent sub-arrays, and data bits and error checking and correcting (ECC) bits of a word are stored in respective ones of the physically-independent sub-arrays. By spatially diffusing data bits and ECC bits from a word, the likelihood of multiple-bit errors within the word is reduced. This is advantageous since most ECC circuitry is capable of correcting only single-bit errors within a given word. Other preferred embodiments are disclosed.
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申请公布号 |
US2002083390(A1) |
申请公布日期 |
2002.06.27 |
申请号 |
US20000747574 |
申请日期 |
2000.12.22 |
申请人 |
MATRIX SEMICONDUCTOR, INC. |
发明人 |
LEE THOMAS H.;CLEEVES JAMES M.;JOHNSON MARK G. |
分类号 |
G06F11/10;H01L27/10;(IPC1-7):G11C29/00 |
主分类号 |
G06F11/10 |
代理机构 |
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地址 |
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