发明名称 ENCODING SYSTEM FOR TRANSMITTING DATA AND CLOCK SIGNALS JOINTLY ACROSS TWO WIRES
摘要 <p>An information processing system contains a sender, a receiver and a communication channel coupled between the sender and the receiver. The communication channel transmits a first and second binary logic signal. The sender encodes data values and information distinguishing successive clock phases into a combination of the first and second signal. The receiver receives the data values and the information. The sender uses alternately a first and a second data dependent criterion to select which one of the first and second signal has a logic level change between immediately successive clock phases. As a result so that the first and second signal are alternately mutually opposite and mutually equal. The first criterion selects the level of the first signal dependent on the data value. The second criterion provides for a level change of either the first or the second signal depending on the data value.</p>
申请公布号 WO2002051081(A2) 申请公布日期 2002.06.27
申请号 IB2001002395 申请日期 2001.12.06
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