| 摘要 |
There is disclosed a weighted ladder network for use in digital to analog converters which s characterized by faster speeds than the common R/2R and binary ladder configurations for the same total power consumption. The technique involves splitting up a conventional ladder network into two separate sections. The first section is a conventional binary ladder driven by equal current sources. The second section, however, involves weighting the resistance elements and the current sources in such a manner that the total resistance of the circuit is minimized.
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