摘要 |
Provided is a semiconductor device manufacturing process capable of forming an interconnection trench and a via hole highly precisely in a dual-damascene process. In the semiconductor device manufacturing method in accordance with the present invention, first, second, and third insulating layers are formed over a lower interconnection, a part of the third insulating layer is selectively etched to form an upper trench, which exposes an upper surface of the second insulating layer; a via hole, of which diameter is smaller than the width of the upper trench, is formed in the second and first insulating layers, and the second insulating layer is selectively etched to form a lower trench whose width is nearly identical to the width of the upper trench, an interconnection trench for an upper interconnection being thereby formed in the third and second insulating layers. When a resist mask is used for formation of the via hole, since the thickness of the resist mask can be made larger than the depth of the upper trench, the resist mask has no large step along the edges of the upper trench.
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