发明名称 |
DUAL DAMASCENE PROCESS UTILIZING A LOW-K DUAL DIELECTRIC |
摘要 |
A method of fabricating an integrated circuit with a dual dielectric structure and utilizes a dual damascene process to fabricate metal interconnection layers. The dual dielectric structure consists of a first insulating layer (24) of conventional dielectric material, and a second insulating layer (26) of a second dielectric material with a low dielectric constant (low-k dielectric material). The first dielectric material is used in regions of the integrated circuit where the superior mechanical properties of conventional dielectric materials will result in maintaining the reliability and mechanical properties of the integrated circuit. The second dielectric material is used in regions of the integrated circuit where the low dielectric constant will result in improved speed of the integrated circuit and reduced electrical coupling between conductors in the integrated circuit. The fabrication of the dual dielectric structure is integrated with a dual damascene metallization process. |
申请公布号 |
WO0199184(A3) |
申请公布日期 |
2002.06.27 |
申请号 |
WO2001US19881 |
申请日期 |
2001.06.21 |
申请人 |
INFINEON TECHNOLOGIES NORTH AMERICA CORP. |
发明人 |
STETTER, MICHAEL;KALTALIOGLU, ERDEM;COWLEY, ANDY |
分类号 |
H01L21/768;H01L23/532 |
主分类号 |
H01L21/768 |
代理机构 |
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代理人 |
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