发明名称 STM LINK PORT DUPLEXING APPARATUS
摘要 PURPOSE: An STM(Synchronous Transport Module) link port duplexing apparatus is provided to efficiently manage a link by variably configuring a duplexing block. CONSTITUTION: A UTOPIA(Universal Test and Operation and Physical Interface for ATM) level 2 interface control unit(25) converts an address of 16-bit data(ATM(Asynchronous Transfer Mode) cell) transmitted from a UTOPIA interface chip(27) to transmit the converted data to a UTOPIA FIFO(22), and converts an address of 16-bit data transmitted from one FIFO between bus matching FIFOs(23,24) to transmit the converted data to a UTOPIA interface chip(27). The UTOPIA FIFO(22) converts the 16-bit data transmitted from the UTOPIA level 2 interface control unit(25) into UTOPIA level 1 8-bit data and transmits the UTOPIA level 1 8-bit data to one STM-1 interface chip between STM-1 interface chips(20,21) according to the address conversion result. The bus matching FIFOs(23,24) convert the UTOPIA level 1 8-bit data transmitted from the STM-1 interface chips(20,21) into UTOPIA level 2 data and transmit the UTOPIA level 2 data to the UTOPIA level 2 interface control unit(25). A processor(26) controls the address converted in the UTOPIA level 2 interface control unit(25).
申请公布号 KR20020049337(A) 申请公布日期 2002.06.26
申请号 KR20000078487 申请日期 2000.12.19
申请人 LG ELECTRONICS INC. 发明人 PARK, JAE YEONG
分类号 H04J3/16;H04L12/56;H04Q11/04;(IPC1-7):H04L12/28 主分类号 H04J3/16
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