| 发明名称 |
Process to lower strap, wordline and bitline contact resistance in trench-based DRAMS by silicidization |
| 摘要 |
A semiconductor device manufacturing method for silicidizing silicon-containing areas in array regions of dynamic random access memory (DRAMS)and embedded DRAM (eDRAM) devices to lower electrical resistance, and improve device reliability at low temperatures.
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| 申请公布号 |
US6410399(B1) |
申请公布日期 |
2002.06.25 |
| 申请号 |
US20000606493 |
申请日期 |
2000.06.29 |
| 申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
FLAITZ PHILIP LEE;HO HERBERT L.;IYER SUBRAMANIAN;KHAN BABAR;PARRIES PAUL C. |
| 分类号 |
H01L21/28;H01L21/285;H01L21/336;H01L21/768;H01L21/8242;(IPC1-7):H01L21/20;H01L21/824 |
主分类号 |
H01L21/28 |
| 代理机构 |
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