发明名称 Semiconductor memory device and synchronous memory
摘要 The present invention provides a semiconductor memory device for storing data. The semiconductor memory device performs data masking without increasing power consumption regardless of latency. The device includes a data output circuit for receiving and outputting the stored data. A mask signal input circuit receives a mask signal used to mask the data output from the data output circuit and provides the mask signal to the data output circuit. An input control circuit generates an activation signal that activates the mask signal input circuit and provides the activation signal to the mask signal input circuit. The input control circuit generates the activation signal based on a mode setting signal and a latency determination signal. The mode setting signal is used to activate the mask signal input circuit and set an operation mode of the semiconductor memory device. The latency determination signal has a level corresponding to latency information.
申请公布号 US6411564(B2) 申请公布日期 2002.06.25
申请号 US20010855656 申请日期 2001.05.16
申请人 FUJITSU LIMITED 发明人 IKEDA SHINICHIRO
分类号 G11C11/407;G11C7/10;G11C11/4093;(IPC1-7):G11C7/00 主分类号 G11C11/407
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