| 摘要 |
A frequency doubling circuit includes an exclusive OR gate which is supplied with an input signal and also with an integrated and quantized version of the input signal. The exclusive OR gate provides an output signal having twice the frequency of the input signal. A weighted adder is provided between an integrator and a quantizer of the frequency doubling circuit. The weighted adder adds the weighted input signal to the integrated signal. Despite runtime effects in the quantizer, the output signal has an undistorted impulse-pause ratio of 1 to 1. The frequency doubling circuit thereby maintains the phase position of the input signal, so that it is suitable for data bus applications with high clock rates or high data rates.
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