| 摘要 |
PURPOSE: To provide an FSK detection circuit which is easily produced in the CMOS process by counting the output of an oscillator which is taken in at intervals of an integer-fold time of the cycle of an input signal in accordance with a gate signal to discriminate the frequency of the input signal. CONSTITUTION: A gate signal detection circuit 2 takes out the gate signal, whose time width corresponds to four periods of the input signal, at intervals of one or two periods because the FSK modulation cycle or the input signal corresponds to 16 cycles of a carrier signal. That is, the gate signal (t3 ) of four periods is taken out three times in total at an interval (t1 ) of one period once and at an interval (t2 ) twice, and this taking-out operation is repeated in 16 cycles of the input signal, and it is denoted as one modulation cycle. The FSK detection circuit successively compares the counted result of a counter circuit 4 obtained in four periods of the input signal. If there is no, a significant difference from the counted result in the same phase in the just preceding modulation cycle, it is detected that the input frequency is not changed; but if there is a significant difference or more, it is detected in accordance with change contents that the input frequency is changed. |
