| 摘要 |
PROBLEM TO BE SOLVED: To reduce the number of CPU commands required in writing on a RAM built in an LSI. SOLUTION: Only a signal corresponding to a start address is assigned enough to generate an address in an address generating circuit 102 by building the address generating circuit 102 capable of specifying a start address for the writing in the RAM 104 by one signal to increment-generate addresses in order, and a data generating circuit 103 for outputting a data while synchronized with the generated address generated in the address generating circuit 102 in, the generated address and the data are stored once in a RAM address setting register RAR 107, and an RAM data setting register RAR 108 respectively to regulate timing of the writing, so as to reduce the number of commands from the CPU required in the writing on the RAM 104.
|
