发明名称 VERIFYING METHOD FOR CIRCUIT OPERATION AND VERIFYING DEVICE
摘要 PROBLEM TO BE SOLVED: To automatically verify at a high speed whether the respective constitutional elements of a semiconductor circuit to be verified satisfy electrical standard, such as voltages, currents and time standard such as voltage impression times. SOLUTION: In an initialization processing of a step 1, circuit diagram data (net list), standard information of the respective elements and input data as time waveform of the voltage or the current to be used for operational simulation are inputted and the circuit diagram data is developed on a memory. After that, operations of the semiconductor circuit to be verified are simulated by using the circuit diagram data and the input data in steps S2 to S10 and everchanging voltage values, current values in input terminals, etc., of the respective circuit elements are stored on the memory. In the case of the operational simulation, whether the respective circuit elements satisfy the corresponding voltage standard, current standard and time standard is verified simultaneously, based on the voltage values and current values stored in the memory.
申请公布号 JP2002175345(A) 申请公布日期 2002.06.21
申请号 JP20010290709 申请日期 2001.09.25
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 KIMURA TOMOO;KATAOKA TOMONORI;NISHIDA YOICHI;FUCHIGAMI IKUO;KAWAI MASARU;ISHIYAMA YASUHIRO
分类号 G01R31/28;G06F17/50;H01L21/82;(IPC1-7):G06F17/50 主分类号 G01R31/28
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